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This book shares with readers practical design knowledge gained from the author’s 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds.

Availability

Inventory Code	Barcode	Call Number	Location	Status
1908002272	EB0002980	621.395 Lee l	Central Library (OPAC)	Available

Detail Information

Series Title: -
Call Number: 621.395 Lee l
Publisher: Switzerland : Springer Cham., 2018
Collation: xxix, 214p.:Ill
Language: English
ISBN/ISSN: 978-3-030-03238-8
Classification: 621.395
Content Type: Ebook
Media Type: -
Carrier Type: online resource
Edition: 1
Subject(s): -
Specific Detail Info: -
Statement of Responsibility: BRF

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Learning from VLSI Design Experience

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