Electronic Resource

Multi-run Memory Tests for Pattern Sensitive Faults

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Penilaian

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This book describes efficient techniques for production testing as well as for periodic maintenance testing (specifically in terms of multi-cell faults) in modern semiconductor memory. The author discusses background selection and address reordering algorithms in multi-run transparent march testing processes. Formal methods for multi-run test generation and many solutions to increase their efficiency are described in detail. All methods presented ideas are verified by both analytical investigations and numerical simulations.

Provides the first book related exclusively to the problem of multi-cell fault detection by multi-run tests in memory testing process;
Presents practical algorithms for design and implementation of efficient multi-run tests;
Demonstrates methods verified by analytical and experimental investigations.

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Availability

Inventory Code	Barcode	Call Number	Location	Status
1908001701	EB0002323	621.381 52 Mro m	Central Library (OPAC)	Available

Detail Information

Series Title

x, 135p.:Ill

Call Number

621.381 52 Mro m

Publisher

Switzerland : Springer Cham., 2018

Collation

Switzerland 

Language

English

ISBN/ISSN

978-3-319-91204-2

Classification

621.381 52

Content Type

Ebook

Media Type

-

Carrier Type

online resource

Edition

1

Subject(s)

Semiconductor storage devices--Testing

Specific Detail Info

-

Statement of Responsibility

BRF

Other version/related

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