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Debugging Systems-on-Chip: Communication-centric and Abstraction-based Techniques

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This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly. Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug flow to be used during the design of an SOC, and customizable off-chip debugger software. Coverage includes an evaluation of the efficiency and effectiveness of the CSAR approach and its supporting infrastructure, using six industrial SOCs and an illustrative, example SOC model. The authors also quantify the hardware cost and design effort to support their approach.

Availability
Inventory Code Barcode Call Number Location Status
1408000443EB0001076006.22 Ver dCentral Library (OPAC)Available
Detail Information
Series Title
Embedded Systems
Call Number
006.22 Ver d
Publisher
Switzerland : Springer Cham.,
Collation
xv, 311p.: Ill.
Language
English
ISBN/ISSN
978-3-319-06242-6
Classification
006.22
Content Type
Ebook
Media Type
-
Carrier Type
online resource
Edition
1
Subject(s)
Systems on a chip
Specific Detail Info
-
Statement of Responsibility
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